Dual pi filter design4/8/2024 ![]() Figure 6 shows a close-up of the two PCB filter boards used in this measurement.įigure 6: T and π filters used for measurementsįigure 7 shows the measurement results for the two configurations shown in Figure 3 and simulated in Figure 4. Since a four-channel network analyzer was used, we could evaluate the two different filter configurations simultaneously. ![]() Figure 5: EMC filter VNA measurement setup To verify the simulations results the measurement setup shown in Figure 5 was used. This is consistent with the general rule that the inductor should be placed on the low-impedance side and the capacitor on the high-impedance side. The insertion loss of the π filter at 10 MHz is about 29.5 dB higher than that of the T filter. Figure 4: Insertion loss of the two configurations shown in Figure 3Īs can be seen from Figure 4, the π filter outperforms the T filter (except for a small range of frequency around the resonance point at 1 MHz). ![]() The filter configurations are tested with 1 kΩ impedance on the load side.įigure 4 shows the insertion loss of the two filter configurations. The measurement made by the network analyzer at Port 2 is across its internal 50 Ohm impedance. ![]() Verification via Simulations and Measurements π and T Filter Comparisonįigure 3 shows the LT spice simulation schematic. The 50 Ohm source impedance is provided by the network analyzer at Port 1. Figure 2: π and T filters: source impedance low and load impedance highįigure 3: T and π filter configurations – low impedance source, high impedance load ![]()
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